Decades Overview

DECADES Project

DECADES is a $5.8-million project being led by PIs from Princeton and Columbia. The project is part of an effort to create hardware and software that can be reconfigured on the fly to accelerate important applications. This project aims to keep electronics going after Moore’s Law is a thing of the past.


Role
Principal
Investigators 		Margaret Martonosi David Wentzlaff Luca Carloni
Post Docs and
Researchers		 Esin Tureci
Stojche Nakov		 Biruk Seyoum
Students Aninda Manocha
Marcelo Orenes Vera		 August Ning
Fei Gao
Paul Jackson
Jinzheng Tu
Ang Li		 Joseph Zuckerman
Gabriele Tombesi

Software

MosaicSim: A cycle-accurate, LLVM-based simulator for heterogeneous systems:
https://github.com/PrincetonUniversity/MosaicSim

DEC++: A LLVM based compiler front end for MosaicSim; supports C/++, and Python through Numba
https://github.com/PrincetonUniversity/DecadesCompiler

Simulator and Compiler Support: Docker, Documentation, and Tutorial
https://hub.docker.com/repository/docker/princetondecades/decades
https://github.com/PrincetonUniversity/decades_documentation
https://github.com/amanocha/DECADES_Applications

ESP: An open-source research platform for heterogeneous system-on-chip design
https://esp.cs.columbia.edu

OpenPiton: An open-source research platform for full-stack manycore system prototyping
http://openpiton.org

Publications

  • Marcelo Orenes-Vera, Hyunsung Yun, Nils Wistoff, Gernot Heiser, Luca Benini, David Wentzlaff and Margaret Martonosi. “AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware.” 56th Annual International Symposium on Microarchitecture (MICRO), 2023. (pdf) (github)

  • Aninda Manocha, Zi Yan, Esin Tureci, J. L. Aragón, David Nellans and Margaret Martonosi. “Architectural Support for Optimizing Huge Page Selection Within the OS.” 56th Annual International Symposium on Microarchitecture (MICRO), 2023.

  • Yanwen Xu, Ang Li, Tyler Sorensen, “Redwood: Flexible and Portable Heterogeneous Tree Traversal Workloads” in IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2023 (pdf)

  • Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi. “Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications.” In Proceedings of the 29th Annual International Symposium on High Performance Computer Architecture (HPCA), 2023. (pdf)

  • Biruk Seyoum, Davide Giri, Kuan-Lin Chiu, Bryce Natter and Luca Carloni. “PR-ESP: An Open-Source Platform for Design and Programming of Partially Reconfigurable SoCs.” In Proceedings of the Design, Automation & Test in Europe Conference (DATE), 2023. (pdf)

  • Fei Gao, Ting-Jung Chang, Ang Li, Marcelo Orenes-Vera, Davide Giri, Paul Jackson, August Ning, Georgios Tziantzioulis, Joseph Zuckerman, Jinzheng Tu, Kaifeng Xu, Grigory Chirkov, Gabriele Tombesi, Jonathan Balkind, Margaret Martonosi, Luca Carloni, David Wentzlaff. “DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET.” In Proceedings of the IEEE Custom Integrated Circuits Conference (CICC), 2023. (pdf)

  • Grigory Chirkov, David Wentzlaff. “SMAPPIC: Scalable Multi-FPGA Architecture Prototype Platform in the Cloud.” In Proceedings of the 28th Annual International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2023. (pdf) (github)

  • Marcelo Orenes-Vera, Aninda Manocha, Jonathan Balkind, Fei Gao, Juan L. Aragón, David Wentzlaff, Margaret Martonosi. “Tiny but Mighty: Designing and Realizing Scalable Latency Tolerance for Manycore SoCs” In Proceedings of the 49th Annual International Symposium on Computer Architecture (ISCA), 2022. (IEEE MICRO Top Picks Honorable Mention) (pdf) (demo) (github)

  • Aninda Manocha, Juan L. Aragón, Margaret Martonosi. “GraphFire: Synergizing Fetch, Insertion, and Replacement Policies for Graph Analytics” In IEEE Transactions on Computers, 2022. (pdf) (github)

  • Marcelo Orenes-Vera, Aninda Manocha, David Wentzlaff, Margaret Martonosi. “AutoSVA: Democratizing Formal Verification of RTL Module Interactions” In 58th Design Automation Conference (DAC), 2021 (pdf) (recording) (slides) (github)

  • Joseph Zuckerman, Davide Giri, Jihye Kwon, Paolo Mantovani and Luca P. Carloni. “Cohmeleon: Learning-Based Orchestration of Accelerator Coherence in Heterogeneous SoCs.” 54th Annual International Symposium on Microarchitecture (MICRO), 2021. (pdf)

  • Aninda Manocha, Tyler Sorensen, Opeoluwa Matthews, Esin Tureci, Juan L. Aragón, Margaret Martonosi. “GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures” In ACM Transactions on Architecture and Code Optimization (TACO) Vol. 18, No. 4, 2021 (pdf) (github)

  • Tyler Sorensen, Aninda Manocha, Esin Tureci, Marcelo Orenes Vera, Juan L. Aragón, Margaret Martonosi. [Invited Talk] “A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration” In Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020 (pdf) (slides) (github)

  • Jonathan Balkind, Katie Lim, Michael Schaffner, Fei Gao, Grigory Chirkov, Ang Li, Alexey Lavrov, Tri M. Nguyen, Yaosheng Fu, Florian Zaruba, Kunal Gulati, Luca Benini, and David Wentzlaff. “BYOC: A Bring Your Own Core Framework for Heterogeneous-ISA Research” In International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2020 Link

  • Luwa Matthews, Aninda Manocha, Davide Giri, Marcelo Orenes Vera, Esin Tureci, Tyler Sorensen, Tae Jun Ham, Juan Luis Aragon, Luca P. Carloni, Margaret Martonosi, “MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems” in IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2020 (best paper nomination!) Link

  • Davide Giri, Kuan-lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, and Luca P. Carloni, “ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning” in Designs Automation and Test in Europe Conference (DATE), 2020 Link

  • Tae Jun Ham, Juan Luis Aragon, and Margaret Martonosi, “Efficient Data Supply for Parallel Heterogeneous Architectures”, in ACM Transactions on Architecture and Code Optimization (TACO), 2019 (presented at HiPEAC 2020) Link

  • Davide Giri, Paolo Mantovani, and Luca P. Carloni, “Runtime Reconfigurable Memory Hierarchy in Embedded Scalable Platforms,” In ACM Asia and South Pacific Design, Automation Conference (ASPDAC), 2019 Link

  • Davide Giri, Paolo Mantovani and Luca P. Carloni, “Accelerators and Coherence: An SoC Perspective,” in IEEE MICRO, 2018 Link

  • Davide Giri, Paolo Mantovani and Luca P. Carloni, “NoC-Based Support of Heterogeneous Cache-Coherence Models for Accelerators,” in IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2018 Link

  • Tae Jun Ham, Juan Luis Aragon, and Margaret Martonosi, “Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures”, in ACM Transactions on Architecture and Code Optimization (TACO), 2017 Link

  • Tae Jun Ham, Lisa Wu, Narayanan Sundaram, Nadathur Satish, and Margaret Martonosi, “Graphicionado: A High-Performance and Energy Efficient Accelerator for Graph Analytics”, In IEEE Symposium on Microarchitecture (MICRO), 2016 Link

  • Tae Jun Ham, Juan Luis Aragon, and Margaret Martonosi, “DeSC: Decoupled Supply-Compute Communication Management for Heterogeneous Architectures”, in IEEE Symposium on Microarchitecture (MICRO), 2015 (selected as honorable mention for IEEE Top Picks 2015) Link

    • Presentations